OTTAWA and SANTA CLARA, CA — (Marketwired) — 04/02/13 —
Sidense will be exhibiting at the U.S. TMSC Technology Symposiums and discussing its low-cost, secure and reliable 1T-OTP non-volatile memory (NVM) IP, available from 180nm to 20nm including HV and BCD process nodes.
San Jose McEnery Convention Center
150 West San Carlos Street
San Jose, CA 95113
Booth #503
The Westin Austin at the Domain
11301 Domain Drive
Austin, TX 78758
The Westin-Waltham Boston
70 3rd Ave
Waltham, MA 02451
San Jose on Tuesday, April 9, 2012
8AM to 6PM
Austin on Tuesday, April 16, 2012
8AM to 3:30PM
Boston on Tuesday, April 23, 2012
8AM to 3:30PM
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required. The Company-s innovative one-transistor 1T-Fuse architecture provides the industry-s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (LNVM) IP solution. With over 100 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense SiPROM, SLP and ULP memory products, embedded in more than 250 customer designs, are available from 180nm down to 20nm and are scalable to smaller geometries. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit .
Join the 19th annual TSMC Technology Symposium and get first-hand updates on TSMC-s advanced and specialty technologies, advanced backend capabilities and future development plans.
For more information or to schedule a meeting with Sidense please contact:
Jim Lipman for San Jose
925-606-1370
Susann Friedricks for Austin and Boston
830-613-8948
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