MAZeT offers Interbus-IP for customized FPGA and ASIC implementation
Electronics & Semiconductors, Picture Gallery Wednesday, 25. March 2009Jena, 17 March 2009 – MAZeT GmbH offers IP cores for the Interbus protocol (SUPI4 / Phoenix Contact) for implementation in FPGAs and ASICs. The protocol chip for serial communication interfaces in automation technology was developed and maintained by MAZeT. The SUPI4 protocol chip, presented by Phoenix Contact at SPS/IPC Drives 2008, is an implementation of the Interbus-IP core, which has enhanced functionality in comparison to the previous protocol ASIC SUPI3.
In customized applications, it is often required to directly integrate this interface into the FPGA or ASIC. For cases such as these, MAZeT offers interested customers the IPs and the implementation support. If the customer so requests, then MAZeT can undertake the complete design of the ASIC, FPGA or module – including production. MAZeT has many years of extensive experience in the implementation of Interbus protocol-IPs. A modified version of the Interbus-IP has been also used in non-industrial applications. One example is a safety-relevant communication system to transfer voice traffic in which the modified Interbus has proven itself to be successful for many years now.
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Please visit MAZeT at SENSOR+TEST 2009 at Stand 322 in Hall 12
Nuremburg, Germany, on May 26 to 28, 2009
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Posted by Publisher on 25. March 2009. Filed under Electronics & Semiconductors, Picture Gallery.
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