SAN JOSE, CA — (Marketwired) — 07/29/13 — Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced its sponsorship of , the premier conference on memory technology and innovation, started by Denali Systems, a company Cadence acquired in 2010. In addition to sponsoring this conference, Cadence is keynoting the event, participating in a panel, and demonstrating new products.
Martin Lund, Cadence® Sr. Vice President, Research and Development, SoC Realization Group, will give the introductory conference keynote, “Memory in the Post PC Era.”
Cadence Fellow Gopal Raghavan will participate in the panel session, “Wider vs. Faster.”
Visitors to the Cadence booth can see the following demonstrations:
Robust DDR4 IP with per-bit delay adjustment
Power-optimized LPDDR3 IP
Chip-package-board co-simulation with electrical compliance of memory interfaces
Verification IP memory models to verify essential new interfaces
Scheduled for: August 6, 2013
Santa Clara Convention Center,
Santa Clara, California
Cadence enables global electronic design innovation and plays an essential role in the creation of today-s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at .
© 2013 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and the Cadence logo are registered trademarks of Cadence Design Systems, Inc. in the United States and other countries.
Dean Solov
Cadence Design Systems, Inc.
(408) 944-7226
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