SAN JOSE, CA — (Marketwired) — 04/20/15 –Monterey Beach Resort
2600 Sand Dunes Drive
Monterey, California 93940April 23-24, 2015
Day two: Low Power DesignPrasad Subramaniam, eSilicon
vice president of R&D and design technologyLow-Power Design MethodologiesLow Power Panel: Low Power Tools, Techniques & and Verification: Brian Fuller, CadenceBernard Murphy, AtrentaSteve Carlson, CadencePrasad Subramaniam, eSiliconPat Sheridan, SynopsysTom Quan, TSMCThe Electronic Design Process Symposi
SAN JOSE, CA — (Marketwired) — 04/16/15 –DoubleTree by Hilton Hotel San Jose
2050 Gateway Place
San Jose, California 95110April 21, 2015Daniel Nenni, SemiWiki.com CEO & FounderJack Harding, eSilicon, president & CEOWally Rhines, Mentor Graphics, CEO & COBGiorgio Cesana, STMicroelectronics, director of technologyLluis Paris, TSMC, deputy director of worldwide IP allianceThe system on chip (SoC) business seriously challenged the semiconductor foundries at 28nm with increased integr